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Microchip Technology /ATSAME70Q20 /TWIHS0 /SMR

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Interpret as SMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NACKEN)NACKEN 0 (SMDA)SMDA 0 (SMHH)SMHH 0 (SCLWSDIS)SCLWSDIS 0MASK0SADR0 (SADR1EN)SADR1EN 0 (SADR2EN)SADR2EN 0 (SADR3EN)SADR3EN 0 (DATAMEN)DATAMEN

Description

Slave Mode Register

Fields

NACKEN

Slave Receiver Data Phase NACK enable
SMDA

SMBus Default Address
SMHH

SMBus Host Header
SCLWSDIS

Clock Wait State Disable
MASK

Slave Address Mask
SADR

Slave Address
SADR1EN

Slave Address 1 Enable
SADR2EN

Slave Address 2 Enable
SADR3EN

Slave Address 3 Enable
DATAMEN

Data Matching Enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data